Team

Executive

• 35+ years of experience
• Frond-end/back-end design start from 0.5um down to 5nm for more than 400+ projects NTO to TSMC with all successful history
• 20+ years with firmware/system development, involves crypto-technology, Satellite EMMG/ECMG/STB design from silicon to whole system

Back-end Design Team

• Average 25+ years of experience
• Extensive experience with Top-down / sys / block level implementation, specialized on advanced technology nodes and large-scale integration
• Worked on High-speed IP (CPU, GPU, DDR, LPDDR, HBM3, UCIe, PCIe) implementation

Front-end Design Team

• Average 20+ years of experience
• Knowledgeable in SerDes architecture, Monitor/TV system, Mobile system digital and mixed-signal circuit design, COT design flow and chip verification
• Familiar with RISC-V SOC platform with AI HW accelerators with new CIM (Computing In Memory) technology for NN computation
• Experienced in PCIe PHY and digital controller architecture and system design integration & verification

SIPI Analysis Team

• Average 20+ years of experience
• Key members for 3DIC integration
• Knowledgeable in SI, PI, EMI simulation, IP Floor plan design, ESD simulation, and Antenna design
• Strong knowledge in High-speed circuit & PCB design and verification as well as Package Design
• Experienced in Substrate design and IC verification